Nonvolatile memory (NVM) retains stored data when power is removed, which is desired in many different applications. One type of NVM is the one time programmable (OTP) memory based on thin dielectric breakdown. This type semiconductor memory cell has a data storage element (programmable element) constructed around a thin dielectric layer, such as a gate oxide. The digital information “one” or “zero” stored in the memory cell is formed by stressing the thin dielectric into breakdown (soft or hard breakdown) to set the read current level of the memory cell. The memory cell is read by sensing the current drawn by the cell.
A suitable thin dielectric is high quality gate oxide of about 50 angstroms thick or less, as commonly available from advanced CMOS logic processes. Various details of such NVM memory can be found in U.S. Pat. No. 6,667,902 entitled “Semiconductor Memory Cell and Memory Array Using a Breakdown Phenomena in an Ultra-Thin Dielectric”, U.S. Pat. No. 6,822,888 entitled “Semiconductor Memory Cell and Memory Array Using a Breakdown Phenomena in an Ultra-Thin Dielectric”, and U.S. Pat. No. 6,671,040 entitled “Programming Methods and Circuits for Semiconductor Memory Cell and Memory Array Using a Breakdown Phenomena in an Ultra-Thin Dielectric”, commonly assigned to the assignee herein and incorporated by reference.
There are various advantages of OTP semiconductor memory using gate oxide breakdown. First, it is compatible with CMOS processing making it suitable for embedded memory integrated into a CMOS circuit/system. Second, because it is CMOS compatible, it has a shorter development cycle than other memories. Third, it is very secure for the stored information. Once the information is stored, it is nearly impossible for it to be changed without destroying the data. It is also very difficult to decode the information stored, either electronically or physically.
There are still difficulties, however, with current OTP cell using gate oxide breakdown. First, the variation of a programmed cell in terms of its read current is still large. Second, the conductivity of a programmed bit is not as high as desired. Third, the read offset voltage is high. Fourth, the leakage of the memory during programming is relatively high. All of these drawbacks become critical as the semiconductor manufacturing process scales down to and beyond 90 nm.